00001 /* 00002 * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors 00003 * to the MC1322x project (http://mc1322x.devl.org) 00004 * All rights reserved. 00005 * 00006 * Redistribution and use in source and binary forms, with or without 00007 * modification, are permitted provided that the following conditions 00008 * are met: 00009 * 1. Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * 2. Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * 3. Neither the name of the Institute nor the names of its contributors 00015 * may be used to endorse or promote products derived from this software 00016 * without specific prior written permission. 00017 * 00018 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 00019 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00020 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00021 * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 00022 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00023 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 00024 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 00025 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00026 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 00027 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00028 * SUCH DAMAGE. 00029 * 00030 * This file is part of libmc1322x: see http://mc1322x.devl.org 00031 * for details. 00032 * 00033 * 00034 */ 00035 00036 #ifndef UART1_H 00037 #define UART1_H 00038 00039 #include <stdint.h> 00040 00041 #define UCON (0) 00042 /* UCON bits */ 00043 #define UCON_SAMP 10 00044 #define UCON_SAMP_8X 0 00045 #define UCON_SAMP_16X 1 00046 00047 #define USTAT (0x04) 00048 #define UDATA (0x08) 00049 #define URXCON (0x0c) 00050 #define UTXCON (0x10) 00051 #define UCTS (0x14) 00052 #define UBRCNT (0x18) 00053 00054 #define UART1_BASE (0x80005000) 00055 #define UART2_BASE (0x8000b000) 00056 00057 #define UART1_UCON ((volatile uint32_t *) ( UART1_BASE + UCON )) 00058 #define UART1_USTAT ((volatile uint32_t *) ( UART1_BASE + USTAT )) 00059 #define UART1_UDATA ((volatile uint32_t *) ( UART1_BASE + UDATA )) 00060 #define UART1_URXCON ((volatile uint32_t *) ( UART1_BASE + URXCON )) 00061 #define UART1_UTXCON ((volatile uint32_t *) ( UART1_BASE + UTXCON )) 00062 #define UART1_UCTS ((volatile uint32_t *) ( UART1_BASE + UCTS )) 00063 #define UART1_UBRCNT ((volatile uint32_t *) ( UART1_BASE + UBRCNT )) 00064 00065 #define UART2_UCON ((volatile uint32_t *) ( UART2_BASE + UCON )) 00066 #define UART2_USTAT ((volatile uint32_t *) ( UART2_BASE + USTAT )) 00067 #define UART2_UDATA ((volatile uint32_t *) ( UART2_BASE + UDATA )) 00068 #define UART2_URXCON ((volatile uint32_t *) ( UART2_BASE + URXCON )) 00069 #define UART2_UTXCON ((volatile uint32_t *) ( UART2_BASE + UTXCON )) 00070 #define UART2_UCTS ((volatile uint32_t *) ( UART2_BASE + UCTS )) 00071 #define UART2_UBRCNT ((volatile uint32_t *) ( UART2_BASE + UBRCNT )) 00072 00073 /* The mc1322x has a 32 byte hardware FIFO for transmitted characters. 00074 * Currently it is always filled from a larger RAM buffer. It would be 00075 * possible to eliminate that overhead by filling directly from a chain 00076 * of data buffer pointers, but printf's would be not so easy. 00077 */ 00078 #define UART1_TX_BUFFERSIZE 1024 00079 extern volatile uint32_t u1_tx_head, u1_tx_tail; 00080 void uart1_putc(char c); 00081 00082 /* The mc1322x has a 32 byte hardware FIFO for received characters. 00083 * If a larger rx buffersize is specified the FIFO will be extended into RAM. 00084 * RAM transfers will occur on interrupt when the FIFO is nearly full. 00085 * Hardware flow control will trigger when the RAM buffer is full. 00086 * If a smaller buffersize is specified hardware flow control will be 00087 * initiated at that FIFO level. 00088 * Set to 32 for no flow control or RAM buffer. 00089 */ 00090 #define UART1_RX_BUFFERSIZE 128 00091 #if UART1_RX_BUFFERSIZE > 32 00092 extern volatile uint16_t u1_rx_head, u1_rx_tail, u1_rx_hyst; 00093 #define uart1_can_get() ((*UART1_URXCON > 0) || (u1_rx_head!=u1_rx_tail)) 00094 #else 00095 #define uart1_can_get() (*UART1_URXCON > 0) 00096 #endif 00097 uint8_t uart1_getc(void); 00098 00099 00100 00101 #endif