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00053 #ifndef HAL_AVR_H
00054 #define HAL_AVR_H
00055
00056 #include <stdint.h>
00057 #include <stdbool.h>
00058 #include <avr/io.h>
00059 #include <avr/interrupt.h>
00060 #include <util/crc16.h>
00061 #include "contiki-conf.h"
00062
00063
00064
00065 #define TRIG1 DDRB |= 0x04, PINB |= 0x04
00066 #define TRIG2 DDRD |= 0x80, PIND |= 0x80
00067
00068
00069
00070
00071
00072
00073
00074
00075
00076
00077
00078 #define RAVEN_D 4
00079 #define RAVENUSB_C 1
00080 #define RCB_B 2
00081 #define ZIGBIT 3
00082
00083
00084
00085
00086 #if RCB_REVISION == RCB_B
00087
00088 # define SSPORT B
00089 # define SSPIN (0x00)
00090 # define SPIPORT B
00091 # define MOSIPIN (0x02)
00092 # define MISOPIN (0x03)
00093 # define SCKPIN (0x01)
00094 # define RSTPORT B
00095 # define RSTPIN (0x05)
00096 # define IRQPORT D
00097 # define IRQPIN (0x04)
00098 # define SLPTRPORT B
00099 # define SLPTRPIN (0x04)
00100 # define USART 1
00101 # define USARTVECT USART1_RX_vect
00102 # define TICKTIMER 3
00103 # define HAS_SPARE_TIMER
00104
00105 #elif HARWARE_REVISION == ZIGBIT
00106
00107 # define SSPORT B
00108 # define SSPIN (0x00)
00109 # define SPIPORT B
00110 # define MOSIPIN (0x02)
00111 # define MISOPIN (0x03)
00112 # define SCKPIN (0x01)
00113 # define RSTPORT A
00114 # define RSTPIN (0x07)
00115 # define IRQPORT E
00116 # define IRQPIN (0x05)
00117 # define SLPTRPORT B
00118 # define SLPTRPIN (0x04)
00119 # define TXCWPORT B
00120 # define TXCWPIN (0x07)
00121 # define USART 1
00122 # define USARTVECT USART1_RX_vect
00123
00124
00125
00126
00127 #elif RAVEN_REVISION == RAVEN_D
00128
00129 # define SSPORT B
00130 # define SSPIN (0x04)
00131 # define SPIPORT B
00132 # define MOSIPIN (0x05)
00133 # define MISOPIN (0x06)
00134 # define SCKPIN (0x07)
00135 # define RSTPORT B
00136 # define RSTPIN (0x01)
00137 # define IRQPORT D
00138 # define IRQPIN (0x06)
00139 # define SLPTRPORT B
00140 # define SLPTRPIN (0x03)
00141 # define TXCWPORT B
00142 # define TXCWPIN (0x00)
00143 # define USART 1
00144 # define USARTVECT USART1_RX_vect
00145 # define TICKTIMER 3
00146 # define HAS_CW_MODE
00147 # define HAS_SPARE_TIMER
00148
00149 #elif RAVEN_REVISION == RAVENUSB_C
00150
00151 # define SSPORT B
00152 # define SSPIN (0x00)
00153 # define SPIPORT B
00154 # define MOSIPIN (0x02)
00155 # define MISOPIN (0x03)
00156 # define SCKPIN (0x01)
00157 # define RSTPORT B
00158 # define RSTPIN (0x05)
00159 # define IRQPORT D
00160 # define IRQPIN (0x04)
00161 # define SLPTRPORT B
00162 # define SLPTRPIN (0x04)
00163 # define TXCWPORT B
00164 # define TXCWPIN (0x07)
00165 # define USART 1
00166 # define USARTVECT USART1_RX_vect
00167 # define TICKTIMER 3
00168 # define HAS_CW_MODE
00169 # define HAS_SPARE_TIMER
00170
00171 #else
00172
00173 #error "Platform undefined in hal.h"
00174
00175 #endif
00176
00177
00178
00179
00180
00181
00182
00183
00184
00185
00186
00187
00188 #define CAT(x, y) x##y
00189 #define CAT2(x, y, z) x##y##z
00190 #define DDR(x) CAT(DDR, x)
00191 #define PORT(x) CAT(PORT, x)
00192 #define PIN(x) CAT(PIN, x)
00193 #define UCSR(num, let) CAT2(UCSR,num,let)
00194 #define RXEN(x) CAT(RXEN,x)
00195 #define TXEN(x) CAT(TXEN,x)
00196 #define TXC(x) CAT(TXC,x)
00197 #define RXC(x) CAT(RXC,x)
00198 #define RXCIE(x) CAT(RXCIE,x)
00199 #define UCSZ(x,y) CAT2(UCSZ,x,y)
00200 #define UBRR(x,y) CAT2(UBRR,x,y)
00201 #define UDRE(x) CAT(UDRE,x)
00202 #define UDRIE(x) CAT(UDRIE,x)
00203 #define UDR(x) CAT(UDR,x)
00204 #define TCNT(x) CAT(TCNT,x)
00205 #define TIMSK(x) CAT(TIMSK,x)
00206 #define TCCR(x,y) CAT2(TCCR,x,y)
00207 #define COM(x,y) CAT2(COM,x,y)
00208 #define OCR(x,y) CAT2(OCR,x,y)
00209 #define CS(x,y) CAT2(CS,x,y)
00210 #define WGM(x,y) CAT2(WGM,x,y)
00211 #define OCIE(x,y) CAT2(OCIE,x,y)
00212 #define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
00213 #define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
00214 #define RXVECT(x) CAT2(USART,x,_RX_vect)
00215
00216
00217
00218
00219
00220
00221
00222
00223 #define SLP_TR SLPTRPIN
00224 #define DDR_SLP_TR DDR( SLPTRPORT )
00225 #define PORT_SLP_TR PORT( SLPTRPORT )
00226 #define PIN_SLP_TR PIN( SLPTRPORT )
00227 #define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) )
00228 #define hal_set_slptr_low( ) ( PORT_SLP_TR &= ~( 1 << SLP_TR ) )
00229 #define hal_get_slptr( ) ( ( PIN_SLP_TR & ( 1 << SLP_TR ) ) >> SLP_TR )
00230 #define RST RSTPIN
00231 #define DDR_RST DDR( RSTPORT )
00232 #define PORT_RST PORT( RSTPORT )
00233 #define PIN_RST PIN( RSTPORT )
00234 #define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) )
00235 #define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) )
00236 #define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST )
00237 #define HAL_SS_PIN SSPIN
00238 #define HAL_PORT_SPI PORT( SPIPORT )
00239 #define HAL_DDR_SPI DDR( SPIPORT )
00240 #define HAL_DD_SS SSPIN
00241 #define HAL_DD_SCK SCKPIN
00242 #define HAL_DD_MOSI MOSIPIN
00243 #define HAL_DD_MISO MISOPIN
00244
00245
00246
00247 #define HAL_SS_HIGH( ) (HAL_PORT_SPI |= ( 1 << HAL_SS_PIN ))
00248 #define HAL_SS_LOW( ) (HAL_PORT_SPI &= ~( 1 << HAL_SS_PIN ))
00249
00250
00251
00252
00253
00254
00255
00256
00257 #if ( F_CPU == 16000000UL )
00258 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) )
00259 #define HAL_US_PER_SYMBOL ( 1 )
00260 #define HAL_SYMBOL_MASK ( 0xFFFFffff )
00261 #elif ( F_CPU == 8000000UL )
00262 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
00263 #define HAL_US_PER_SYMBOL ( 2 )
00264 #define HAL_SYMBOL_MASK ( 0x7FFFffff )
00265 #elif ( F_CPU == 4000000UL )
00266 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
00267 #define HAL_US_PER_SYMBOL ( 1 )
00268 #define HAL_SYMBOL_MASK ( 0xFFFFffff )
00269 #elif ( F_CPU == 1000000UL )
00270 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) )
00271 #define HAL_US_PER_SYMBOL ( 2 )
00272 #define HAL_SYMBOL_MASK ( 0x7FFFffff )
00273 #else
00274 #error "Clock speed not supported."
00275 #endif
00276
00277 #if HARWARE_REVISION == ZIGBIT
00278
00279 #define RADIO_VECT INT5_vect
00280 #define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5); DDRE &= ~(1<<DDE5); }
00281 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) )
00282 #else
00283 #define RADIO_VECT TIMER1_CAPT_vect
00284 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( TIMSK1 |= ( 1 << ICIE1 ) )
00285 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) )
00286 #endif
00287
00288 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) )
00289 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
00290
00291
00292 #define AVR_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
00293
00294
00295
00296 #define AVR_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
00297
00298
00299
00300
00301 #define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( )
00302
00303
00304
00305
00306
00307 #define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( )
00308
00309
00310
00311
00312
00313
00314 #define HAL_BAT_LOW_MASK ( 0x80 )
00315 #define HAL_TRX_UR_MASK ( 0x40 )
00316 #define HAL_TRX_END_MASK ( 0x08 )
00317 #define HAL_RX_START_MASK ( 0x04 )
00318 #define HAL_PLL_UNLOCK_MASK ( 0x02 )
00319 #define HAL_PLL_LOCK_MASK ( 0x01 )
00320
00321 #define HAL_MIN_FRAME_LENGTH ( 0x03 )
00322 #define HAL_MAX_FRAME_LENGTH ( 0x7F )
00323
00324
00325
00326
00327
00328
00329
00330 typedef struct{
00331 uint8_t length;
00332 uint8_t data[ HAL_MAX_FRAME_LENGTH ];
00333 uint8_t lqi;
00334 bool crc;
00335 } hal_rx_frame_t;
00336
00337
00338 typedef void (*hal_rx_start_isr_event_handler_t)(uint32_t const isr_timestamp, uint8_t const frame_length);
00339
00340
00341 typedef void (*hal_trx_end_isr_event_handler_t)(uint32_t const isr_timestamp);
00342
00343 typedef void (*rx_callback_t) (uint16_t data);
00344
00345
00346 void hal_init( void );
00347
00348 void hal_reset_flags( void );
00349 uint8_t hal_get_bat_low_flag( void );
00350 void hal_clear_bat_low_flag( void );
00351
00352 hal_trx_end_isr_event_handler_t hal_get_trx_end_event_handler( void );
00353 void hal_set_trx_end_event_handler( hal_trx_end_isr_event_handler_t trx_end_callback_handle );
00354 void hal_clear_trx_end_event_handler( void );
00355
00356 hal_rx_start_isr_event_handler_t hal_get_rx_start_event_handler( void );
00357 void hal_set_rx_start_event_handler( hal_rx_start_isr_event_handler_t rx_start_callback_handle );
00358 void hal_clear_rx_start_event_handler( void );
00359
00360 uint8_t hal_get_pll_lock_flag( void );
00361 void hal_clear_pll_lock_flag( void );
00362
00363 uint8_t hal_register_read( uint8_t address );
00364 void hal_register_write( uint8_t address, uint8_t value );
00365 uint8_t hal_subregister_read( uint8_t address, uint8_t mask, uint8_t position );
00366 void hal_subregister_write( uint8_t address, uint8_t mask, uint8_t position,
00367 uint8_t value );
00368 void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback);
00369 void hal_frame_write( uint8_t *write_buffer, uint8_t length );
00370 void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data );
00371 void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data );
00372
00373 #endif
00374
00375