hal.h

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00001 /*   Copyright (c) 2008, Swedish Institute of Computer Science
00002  *  All rights reserved. 
00003  *
00004  *  Additional fixes for AVR contributed by:
00005  *
00006  *      Colin O'Flynn coflynn@newae.com
00007  *      Eric Gnoske egnoske@gmail.com
00008  *      Blake Leverett bleverett@gmail.com
00009  *      Mike Vidales mavida404@gmail.com
00010  *      Kevin Brown kbrown3@uccs.edu
00011  *      Nate Bohlmann nate@elfwerks.com
00012  *
00013  *   All rights reserved.
00014  *
00015  *   Redistribution and use in source and binary forms, with or without
00016  *   modification, are permitted provided that the following conditions are met:
00017  *
00018  *   * Redistributions of source code must retain the above copyright
00019  *     notice, this list of conditions and the following disclaimer.
00020  *   * Redistributions in binary form must reproduce the above copyright
00021  *     notice, this list of conditions and the following disclaimer in
00022  *     the documentation and/or other materials provided with the
00023  *     distribution.
00024  *   * Neither the name of the copyright holders nor the names of
00025  *     contributors may be used to endorse or promote products derived
00026  *     from this software without specific prior written permission.
00027  *
00028  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00029  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00030  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00031  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00032  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00033  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00034  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00035  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00036  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00037  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038  *  POSSIBILITY OF SUCH DAMAGE.
00039  */
00040 
00041 /**
00042  *    \addtogroup hal
00043  *    @{
00044  */
00045 
00046 /**
00047  *  \file
00048  *  \brief This file contains low-level radio driver code.
00049  *
00050  *   $Id: hal.h,v 1.5 2010/12/03 20:42:01 dak664 Exp $
00051 */
00052 
00053 #ifndef HAL_AVR_H
00054 #define HAL_AVR_H
00055 /*============================ INCLUDE =======================================*/
00056 #include <stdint.h>
00057 #include <stdbool.h>
00058 //#include <util/crc16.h>
00059 #include "contiki-conf.h"
00060 /*============================ MACROS ========================================*/
00061 
00062 // TEST CODE
00063 #define TRIG1 DDRB |= 0x04, PINB |= 0x04
00064 #define TRIG2 DDRD |= 0x80, PIND |= 0x80
00065 
00066 /** \name This is the list of pin configurations needed for a given platform.
00067  * \brief Change these values to port to other platforms.
00068  * \{
00069  */
00070 /* Define all possible revisions here */
00071 // Don't use zero, it will match if undefined!
00072 // RAVEN_D : Raven kit with LCD display
00073 // RAVENUSB_C : used for USB key or Raven card 
00074 // RCB_B : RZ200 kit from Atmel based on 1281V
00075 // ZIGBIT : Zigbit module from Meshnetics
00076 // ATMEGA128RFA1 : Bare chip with internal radio
00077 #define RAVEN_D     4
00078 #define RAVENUSB_C  1
00079 #define RCB_B           2
00080 #define ZIGBIT                  3
00081 #define ATMEGA128RFA1   4
00082 
00083 
00084 
00085 /* TODO: Move to platform (or CPU specific) */
00086 #if RCB_REVISION == RCB_B
00087 /* 1281 rcb */
00088 #   define SSPORT     B
00089 #   define SSPIN      (0x00)
00090 #   define SPIPORT    B
00091 #   define MOSIPIN    (0x02)
00092 #   define MISOPIN    (0x03)
00093 #   define SCKPIN     (0x01)
00094 #   define RSTPORT    B
00095 #   define RSTPIN     (0x05)
00096 #   define IRQPORT    D
00097 #   define IRQPIN     (0x04)
00098 #   define SLPTRPORT  B
00099 #   define SLPTRPIN   (0x04)
00100 #   define USART      1
00101 #   define USARTVECT  USART1_RX_vect
00102 #   define TICKTIMER  3
00103 #   define HAS_SPARE_TIMER
00104 
00105 #elif HARWARE_REVISION == ZIGBIT
00106 /* 1281V Zigbit */
00107 #   define SSPORT     B
00108 #   define SSPIN      (0x00)
00109 #   define SPIPORT    B
00110 #   define MOSIPIN    (0x02)
00111 #   define MISOPIN    (0x03)
00112 #   define SCKPIN     (0x01)
00113 #   define RSTPORT    A
00114 #   define RSTPIN     (0x07)
00115 #   define IRQPORT    E
00116 #   define IRQPIN     (0x05)
00117 #   define SLPTRPORT  B
00118 #   define SLPTRPIN   (0x04)
00119 #   define TXCWPORT   B
00120 #   define TXCWPIN    (0x07)
00121 #   define USART      1
00122 #   define USARTVECT  USART1_RX_vect
00123 //#   define TICKTIMER  3
00124 //#   define HAS_SPARE_TIMER // Not used
00125 
00126 
00127 #elif RAVEN_REVISION == RAVEN_D
00128 /* 1284 raven */
00129 #   define SSPORT     B
00130 #   define SSPIN      (0x04)
00131 #   define SPIPORT    B
00132 #   define MOSIPIN    (0x05)
00133 #   define MISOPIN    (0x06)
00134 #   define SCKPIN     (0x07)
00135 #   define RSTPORT    B
00136 #   define RSTPIN     (0x01)
00137 #   define IRQPORT    D
00138 #   define IRQPIN     (0x06)
00139 #   define SLPTRPORT  B
00140 #   define SLPTRPIN   (0x03)
00141 #   define TXCWPORT   B
00142 #   define TXCWPIN    (0x00)
00143 #   define USART      1
00144 #   define USARTVECT  USART1_RX_vect
00145 #   define TICKTIMER  3
00146 #   define HAS_CW_MODE
00147 #   define HAS_SPARE_TIMER
00148 
00149 #elif RAVEN_REVISION == RAVENUSB_C
00150 /* 1287USB raven */
00151 #   define SSPORT     B
00152 #   define SSPIN      (0x00)
00153 #   define SPIPORT    B
00154 #   define MOSIPIN    (0x02)
00155 #   define MISOPIN    (0x03)
00156 #   define SCKPIN     (0x01)
00157 #   define RSTPORT    B
00158 #   define RSTPIN     (0x05)
00159 #   define IRQPORT    D
00160 #   define IRQPIN     (0x04)
00161 #   define SLPTRPORT  B
00162 #   define SLPTRPIN   (0x04)
00163 #   define TXCWPORT   B
00164 #   define TXCWPIN    (0x07)
00165 #   define USART      1
00166 #   define USARTVECT  USART1_RX_vect
00167 #   define TICKTIMER  3
00168 #   define HAS_CW_MODE
00169 #   define HAS_SPARE_TIMER
00170 
00171 #elif HARWARE_REVISION == ATMEGA128RFA1
00172 /* ATmega1281 with internal AT86RF231 radio */
00173 #if 0
00174 #   define SSPORT     B
00175 #   define SSPIN      (0x04)
00176 #   define SPIPORT    B
00177 #   define MOSIPIN    (0x05)
00178 #   define MISOPIN    (0x06)
00179 #   define SCKPIN     (0x07)
00180 #   define RSTPORT    B
00181 #   define RSTPIN     (0x01)
00182 #   define IRQPORT    D
00183 #   define IRQPIN     (0x06)
00184 #   define SLPTRPORT  B
00185 #   define SLPTRPIN   (0x03)
00186 #   define TXCWPORT   B
00187 #   define TXCWPIN    (0x00)
00188 #endif
00189 #   define SLPTRPORT  TRXPR
00190 #   define SLPTRPIN   1
00191 #   define USART      1
00192 #   define USARTVECT  USART1_RX_vect
00193 #   define TICKTIMER  3
00194 #   define HAS_CW_MODE
00195 #   define HAS_SPARE_TIMER
00196 
00197 #elif CONTIKI_TARGET_MULLE
00198 /* mulle 5.2 (TODO: move to platform specific) */
00199 
00200 #   define SSPORT     3
00201 #   define SSPIN      5
00202 #   define MOSIPORT   1
00203 #   define MOSIPIN    1
00204 #   define MISOPORT   1
00205 #   define MISOPIN    0
00206 #   define SCKPORT    3
00207 #   define SCKPIN     3
00208 #   define RSTPORT    4
00209 #   define RSTPIN     3
00210 #   define IRQPORT    8
00211 #   define IRQPIN     3
00212 #   define SLPTRPORT  0
00213 #   define SLPTRPIN   7
00214 #   define HAS_SPARE_TIMER
00215 
00216 
00217 #else
00218 
00219 #error "Platform undefined in hal.h"
00220 
00221 #endif
00222 
00223 /* For architectures that have all SPI signals on the same port */
00224 #ifndef SSPORT
00225 #define SSPORT SPIPORT
00226 #endif
00227 
00228 #ifndef SCKPORT
00229 #define SCKPORT SPIPORT
00230 #endif
00231 
00232 #ifndef MOSIPORT
00233 #define MOSIPORT SPIPORT
00234 #endif
00235 
00236 #ifndef MISOPORT
00237 #define MISOPORT SPIPORT
00238 #endif
00239 
00240 /** \} */
00241 
00242 /**
00243  * \name Macros used to generate read register names from platform-specific definitions of ports.
00244  * \brief The various CAT macros (DDR, PORT, and PIN) are used to
00245  * assign port/pin/DDR names to various macro variables.  The
00246  * variables are assigned based on the specific connections made in
00247  * the hardware.  For example TCCR(TICKTIMER,A) can be used in place of TCCR0A
00248  * if TICKTIMER is defined as 0.
00249  * \{
00250  */
00251 #if defined(__AVR__)
00252 #define CAT(x, y)      x##y
00253 #define CAT2(x, y, z)  x##y##z
00254 #define DDR(x)         CAT(DDR,  x)
00255 #define PORT(x)        CAT(PORT, x)
00256 #define PIN(x)         CAT(PIN,  x)
00257 #define UCSR(num, let) CAT2(UCSR,num,let)
00258 #define RXEN(x)        CAT(RXEN,x)
00259 #define TXEN(x)        CAT(TXEN,x)
00260 #define TXC(x)         CAT(TXC,x)
00261 #define RXC(x)         CAT(RXC,x)
00262 #define RXCIE(x)       CAT(RXCIE,x)
00263 #define UCSZ(x,y)      CAT2(UCSZ,x,y)
00264 #define UBRR(x,y)      CAT2(UBRR,x,y)
00265 #define UDRE(x)        CAT(UDRE,x)
00266 #define UDRIE(x)       CAT(UDRIE,x)
00267 #define UDR(x)         CAT(UDR,x)
00268 #define TCNT(x)        CAT(TCNT,x)
00269 #define TIMSK(x)       CAT(TIMSK,x)
00270 #define TCCR(x,y)      CAT2(TCCR,x,y)
00271 #define COM(x,y)       CAT2(COM,x,y)
00272 #define OCR(x,y)       CAT2(OCR,x,y)
00273 #define CS(x,y)        CAT2(CS,x,y)
00274 #define WGM(x,y)       CAT2(WGM,x,y)
00275 #define OCIE(x,y)      CAT2(OCIE,x,y)
00276 #define COMPVECT(x)    CAT2(TIMER,x,_COMPA_vect)
00277 #define UDREVECT(x)    CAT2(USART,x,_UDRE_vect)
00278 #define RXVECT(x)      CAT2(USART,x,_RX_vect)
00279 #endif
00280 
00281 /* TODO: Move to CPU specific */
00282 #if defined(CONTIKI_TARGET_MULLE)
00283 #define CAT(x, y)      x##y.BYTE
00284 #define CAT2(x, y, z)  x##y##z.BYTE
00285 #define DDR(x)         CAT(PD,  x)
00286 #define PORT(x)        CAT(P, x)
00287 #define PIN(x)         CAT(P, x)
00288 #define UCSR(num, let) CAT2(UCSR,num,let)
00289 #define RXEN(x)        CAT(RXEN,x)
00290 #define TXEN(x)        CAT(TXEN,x)
00291 #define TXC(x)         CAT(TXC,x)
00292 #define RXC(x)         CAT(RXC,x)
00293 #define RXCIE(x)       CAT(RXCIE,x)
00294 #define UCSZ(x,y)      CAT2(UCSZ,x,y)
00295 #define UBRR(x,y)      CAT2(UBRR,x,y)
00296 #define UDRE(x)        CAT(UDRE,x)
00297 #define UDRIE(x)       CAT(UDRIE,x)
00298 #define UDR(x)         CAT(UDR,x)
00299 #define TCNT(x)        CAT(TCNT,x)
00300 #define TIMSK(x)       CAT(TIMSK,x)
00301 #define TCCR(x,y)      CAT2(TCCR,x,y)
00302 #define COM(x,y)       CAT2(COM,x,y)
00303 #define OCR(x,y)       CAT2(OCR,x,y)
00304 #define CS(x,y)        CAT2(CS,x,y)
00305 #define WGM(x,y)       CAT2(WGM,x,y)
00306 #define OCIE(x,y)      CAT2(OCIE,x,y)
00307 #define COMPVECT(x)    CAT2(TIMER,x,_COMPA_vect)
00308 #define UDREVECT(x)    CAT2(USART,x,_UDRE_vect)
00309 #define RXVECT(x)      CAT2(USART,x,_RX_vect)
00310 #endif
00311 
00312 /** \} */
00313 
00314 /**
00315  * \name Pin macros
00316  * \brief These macros convert the platform-specific pin defines into names and functions
00317  *       that the source code can directly use.
00318  * \{
00319  */
00320 #if defined(__AVR_ATmega128RFA1__)
00321 
00322 #define hal_set_rst_low( )    ( TRXPR &= ~( 1 << TRXRST ) ) /**< This macro pulls the RST pin low. */
00323 #define hal_set_rst_high( )   ( TRXPR |= ( 1 << TRXRST ) ) /**< This macro pulls the RST pin high. */
00324 #define hal_set_slptr_high( ) ( TRXPR |= ( 1 << SLPTR ) )      /**< This macro pulls the SLP_TR pin high. */
00325 #define hal_set_slptr_low( )  ( TRXPR &= ~( 1 << SLPTR ) )     /**< This macro pulls the SLP_TR pin low. */
00326 #define hal_get_slptr( ) (    ( TRXPR & ( 1 << SLPTR ) ) >> SLPTR )  /**< Read current state of the SLP_TR pin (High/Low). */
00327 
00328 #else
00329 #define SLP_TR                SLPTRPIN            /**< Pin number that corresponds to the SLP_TR pin. */
00330 #define DDR_SLP_TR            DDR( SLPTRPORT )    /**< Data Direction Register that corresponds to the port where SLP_TR is connected. */
00331 #define PORT_SLP_TR           PORT( SLPTRPORT )   /**< Port (Write Access) where SLP_TR is connected. */
00332 #define PIN_SLP_TR            PIN( SLPTRPORT )    /**< Pin (Read Access) where SLP_TR is connected. */
00333 #define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) )      /**< This macro pulls the SLP_TR pin high. */
00334 #define hal_set_slptr_low( )  ( PORT_SLP_TR &= ~( 1 << SLP_TR ) )     /**< This macro pulls the SLP_TR pin low. */
00335 #define hal_get_slptr( ) (    ( PIN_SLP_TR & ( 1 << SLP_TR ) ) >> SLP_TR )  /**< Read current state of the SLP_TR pin (High/Low). */
00336 #define RST                   RSTPIN              /**< Pin number that corresponds to the RST pin. */
00337 #define DDR_RST               DDR( RSTPORT )      /**< Data Direction Register that corresponds to the port where RST is */
00338 #define PORT_RST              PORT( RSTPORT )     /**< Port (Write Access) where RST is connected. */
00339 #define PIN_RST               PIN( RSTPORT /* BUG? */)      /**< Pin (Read Access) where RST is connected. */
00340 #define hal_set_rst_high( )   ( PORT_RST |= ( 1 << RST ) )  /**< This macro pulls the RST pin high. */
00341 #define hal_set_rst_low( )    ( PORT_RST &= ~( 1 << RST ) ) /**< This macro pulls the RST pin low. */
00342 #define hal_get_rst( )        ( ( PIN_RST & ( 1 << RST )  ) >> RST )  /**< Read current state of the RST pin (High/Low). */
00343 #define HAL_SS_PIN            SSPIN               /**< The slave select pin. */
00344 #define HAL_SCK_PIN           SCKPIN              /**< Data bit for SCK. */
00345 #define HAL_MOSI_PIN          MOSIPIN
00346 #define HAL_MISO_PIN          MISOPIN
00347 #define HAL_PORT_SPI          PORT( SPIPORT )     /**< The SPI module is located on PORTB. */
00348 #define HAL_PORT_SS            PORT( SSPORT )
00349 #define HAL_PORT_SCK           PORT( SCKPORT )
00350 #define HAL_PORT_MOSI          PORT( MOSIPORT )     /**< The SPI module uses GPIO might be split on different ports. */
00351 #define HAL_PORT_MISO          PORT( MISOPORT )     /**< The SPI module uses GPIO might be split on different ports. */
00352 #define HAL_DDR_SPI           DDR( SPIPORT )      /**< Data Direction Register for PORTB. */
00353 #define HAL_DDR_SS             DDR( SSPORT )      /**< Data Direction Register for MISO GPIO pin. */
00354 #define HAL_DDR_SCK            DDR( SCKPORT )      /**< Data Direction Register for MISO GPIO pin. */
00355 #define HAL_DDR_MOSI           DDR( MOSIPORT )      /**< Data Direction Register for MISO GPIO pin. */
00356 #define HAL_DDR_MISO           DDR( MISOPORT )      /**< Data Direction Register for MOSI GPIO pin. */
00357 #define HAL_DD_SS             SSPIN               /**< Data Direction bit for SS. */
00358 #define HAL_DD_SCK            SCKPIN              /**< Data Direction bit for SCK. */
00359 #define HAL_DD_MOSI           MOSIPIN             /**< Data Direction bit for MOSI. */
00360 #define HAL_DD_MISO           MISOPIN             /**< Data Direction bit for MISO. */
00361 #endif /* defined(__AVR_ATmega128RFA1__) */
00362 
00363 /** \} */
00364 
00365 
00366 #define HAL_SS_HIGH( ) (HAL_PORT_SS |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */
00367 #define HAL_SS_LOW( )  (HAL_PORT_SS &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */
00368 
00369 /** \brief Macros defined for HAL_TIMER1.
00370  *
00371  *  These macros are used to define the correct setupt of the AVR's Timer1, and
00372  *  to ensure that the hal_get_system_time function returns the system time in
00373  *  symbols (16 us ticks).
00374  */
00375 
00376 #if defined(__AVR__)
00377 #if ( F_CPU == 16000000UL )
00378     #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) )
00379     #define HAL_US_PER_SYMBOL ( 1 )
00380     #define HAL_SYMBOL_MASK   ( 0xFFFFffff )
00381 #elif ( F_CPU == 8000000UL )
00382     #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
00383     #define HAL_US_PER_SYMBOL ( 2 )
00384     #define HAL_SYMBOL_MASK   ( 0x7FFFffff )
00385 #elif ( F_CPU == 4000000UL )
00386     #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
00387     #define HAL_US_PER_SYMBOL ( 1 )
00388     #define HAL_SYMBOL_MASK   ( 0xFFFFffff )
00389 #elif ( F_CPU == 1000000UL )
00390     #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) )
00391     #define HAL_US_PER_SYMBOL ( 2 )
00392     #define HAL_SYMBOL_MASK   ( 0x7FFFffff )
00393 #else
00394     #error "Clock speed not supported."
00395 #endif
00396 
00397 #if HARWARE_REVISION == ZIGBIT
00398 // IRQ E5 for Zigbit example
00399 #define RADIO_VECT INT5_vect
00400 #define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5);  DDRE &= ~(1<<DDE5); }
00401 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) )
00402 #else
00403 #define RADIO_VECT TIMER1_CAPT_vect
00404 // Raven and Jackdaw
00405 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( TIMSK1 |= ( 1 << ICIE1 ) )
00406 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) )
00407 #endif
00408 
00409 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) )
00410 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
00411 
00412 /** This macro will protect the following code from interrupts.*/
00413 #define HAL_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
00414 
00415 /** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
00416     so that interrupts are enabled again.*/
00417 #define HAL_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
00418 
00419 #else /* MULLE */
00420 
00421 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE |= 1 )
00422 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE &= ~(1) )
00423 
00424 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 1 )
00425 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 0 )
00426 
00427 /** This macro will protect the following code from interrupts.*/
00428 #define HAL_ENTER_CRITICAL_REGION( ) MULLE_ENTER_CRITICAL_REGION( )
00429 
00430 /** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
00431     so that interrupts are enabled again.*/
00432 #define HAL_LEAVE_CRITICAL_REGION( ) MULLE_LEAVE_CRITICAL_REGION( )
00433 
00434 #endif /* !__AVR__ */
00435 
00436 
00437 /** \brief  Enable the interrupt from the radio transceiver.
00438  */
00439 #define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( )
00440 
00441 /** \brief  Disable the interrupt from the radio transceiver.
00442  *
00443  *  \retval 0 if the pin is low, 1 if the pin is high.
00444  */
00445 #define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( )
00446 /*============================ TYPDEFS =======================================*/
00447 /*============================ PROTOTYPES ====================================*/
00448 /*============================ MACROS ========================================*/
00449 /** \name Macros for radio operation.
00450  * \{ 
00451  */
00452 #define HAL_BAT_LOW_MASK       ( 0x80 ) /**< Mask for the BAT_LOW interrupt. */
00453 #define HAL_TRX_UR_MASK        ( 0x40 ) /**< Mask for the TRX_UR interrupt. */
00454 #define HAL_TRX_END_MASK       ( 0x08 ) /**< Mask for the TRX_END interrupt. */
00455 #define HAL_RX_START_MASK      ( 0x04 ) /**< Mask for the RX_START interrupt. */
00456 #define HAL_PLL_UNLOCK_MASK    ( 0x02 ) /**< Mask for the PLL_UNLOCK interrupt. */
00457 #define HAL_PLL_LOCK_MASK      ( 0x01 ) /**< Mask for the PLL_LOCK interrupt. */
00458 
00459 #define HAL_MIN_FRAME_LENGTH   ( 0x03 ) /**< A frame should be at least 3 bytes. */
00460 #define HAL_MAX_FRAME_LENGTH   ( 0x7F ) /**< A frame should no more than 127 bytes. */
00461 /** \} */
00462 /*============================ TYPDEFS =======================================*/
00463 /** \struct hal_rx_frame_t
00464  *  \brief  This struct defines the rx data container.
00465  *
00466  *  \see hal_frame_read
00467  */
00468 typedef struct{
00469     uint8_t length;                       /**< Length of frame. */
00470     uint8_t data[ HAL_MAX_FRAME_LENGTH ]; /**< Actual frame data. */
00471     uint8_t lqi;                          /**< LQI value for received frame. */
00472     bool crc;                             /**< Flag - did CRC pass for received frame? */
00473 } hal_rx_frame_t;
00474 
00475 /** RX_START event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_rx_start_event_handler(). */
00476 typedef void (*hal_rx_start_isr_event_handler_t)(uint32_t const isr_timestamp, uint8_t const frame_length);
00477 
00478 /** RRX_END event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_trx_end_event_handler(). */
00479 typedef void (*hal_trx_end_isr_event_handler_t)(uint32_t const isr_timestamp);
00480 
00481 typedef void (*rx_callback_t) (uint16_t data);
00482 
00483 /*============================ PROTOTYPES ====================================*/
00484 void hal_init( void );
00485 
00486 void hal_reset_flags( void );
00487 uint8_t hal_get_bat_low_flag( void );
00488 void hal_clear_bat_low_flag( void );
00489 
00490 hal_trx_end_isr_event_handler_t hal_get_trx_end_event_handler( void );
00491 void hal_set_trx_end_event_handler( hal_trx_end_isr_event_handler_t trx_end_callback_handle );
00492 void hal_clear_trx_end_event_handler( void );
00493 
00494 hal_rx_start_isr_event_handler_t hal_get_rx_start_event_handler( void );
00495 void hal_set_rx_start_event_handler( hal_rx_start_isr_event_handler_t rx_start_callback_handle );
00496 void hal_clear_rx_start_event_handler( void );
00497 
00498 uint8_t hal_get_pll_lock_flag( void );
00499 void hal_clear_pll_lock_flag( void );
00500 
00501 /* Hack for atmega128rfa1 with integrated radio. Access registers directly, not through SPI */
00502 #if defined(__AVR_ATmega128RFA1__)
00503 //#define hal_register_read(address) _SFR_MEM8((uint16_t)address)
00504 #define hal_register_read(address) address
00505 uint8_t hal_subregister_read( uint16_t address, uint8_t mask, uint8_t position );
00506 void hal_subregister_write( uint16_t address, uint8_t mask, uint8_t position,
00507                             uint8_t value );
00508 
00509 //#define hal_register_write(address, value) _SFR_MEM8((uint16_t)address)=value
00510 #define hal_register_write(address, value) address=value
00511 //#define hal_subregister_read( address, mask, position ) (_SFR_MEM8((uint16_t)address)&mask)>>position
00512 //#define hal_subregister_read1( address, mask, position ) (address&mask)>>position
00513 //#define hal_subregister_write( address, mask, position, value ) address=(address<<position)&mask
00514 #else
00515 uint8_t hal_register_read( uint8_t address );
00516 void hal_register_write( uint8_t address, uint8_t value );
00517 uint8_t hal_subregister_read( uint8_t address, uint8_t mask, uint8_t position );
00518 void hal_subregister_write( uint8_t address, uint8_t mask, uint8_t position,
00519                             uint8_t value );
00520 #endif
00521 
00522 
00523 
00524 //void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback);
00525 /* For speed RF230BB does not use a callback */
00526 void hal_frame_read(hal_rx_frame_t *rx_frame);
00527 void hal_frame_write( uint8_t *write_buffer, uint8_t length );
00528 void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data );
00529 void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data );
00530 /* Number of receive buffers in RAM. */
00531 #ifndef RF230_CONF_RX_BUFFERS
00532 #define RF230_CONF_RX_BUFFERS 1
00533 #endif
00534 
00535 #endif
00536 /** @} */
00537 /*EOF*/

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