adc.h

00001 /*
00002  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
00003  * to the MC1322x project (http://mc1322x.devl.org)
00004  * All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. Neither the name of the Institute nor the names of its contributors
00015  *    may be used to endorse or promote products derived from this software
00016  *    without specific prior written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00019  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00020  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00022  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00024  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00025  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00026  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00027  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * This file is part of libmc1322x: see http://mc1322x.devl.org
00031  * for details.
00032  *
00033  *
00034  */
00035 
00036 #ifndef ADC_H
00037 #define ADC_H
00038 
00039 #include <stdint.h>
00040 #include "utils.h"
00041 
00042 /* ADC registers are all 16-bit wide with 16-bit access only */
00043 #define ADC_BASE        (0x8000D000)
00044 
00045 /* Structure-based register definitions */
00046 
00047 struct ADC_struct {
00048         union {
00049                 uint16_t COMP[8];
00050                 struct {
00051                         uint16_t COMP_0;
00052                         uint16_t COMP_1;
00053                         uint16_t COMP_2;
00054                         uint16_t COMP_3;
00055                         uint16_t COMP_4;
00056                         uint16_t COMP_5;
00057                         uint16_t COMP_6;
00058                         uint16_t COMP_7;
00059                 };
00060         };
00061         uint16_t BAT_COMP_OVER;
00062         uint16_t BAT_COMP_UNDER;
00063         union {
00064                 uint16_t SEQ_1;
00065                 struct ADC_SEQ_1 {
00066                         uint16_t CH0:1;
00067                         uint16_t CH1:1;
00068                         uint16_t CH2:1;
00069                         uint16_t CH3:1;
00070                         uint16_t CH4:1;
00071                         uint16_t CH5:1;
00072                         uint16_t CH6:1;
00073                         uint16_t CH7:1;
00074                         uint16_t BATT:1;
00075                         uint16_t :6;
00076                         uint16_t SEQ_MODE:1;
00077                 } SEQ_1bits;
00078         };
00079         union {
00080                 uint16_t SEQ_2;
00081                 struct ADC_SEQ_2 {
00082                         uint16_t CH0:1;
00083                         uint16_t CH1:1;
00084                         uint16_t CH2:1;
00085                         uint16_t CH3:1;
00086                         uint16_t CH4:1;
00087                         uint16_t CH5:1;
00088                         uint16_t CH6:1;
00089                         uint16_t CH7:1;
00090                         uint16_t :7;
00091                         uint16_t SEQ_MODE:1;
00092                 } SEQ_2bits;
00093         };
00094         union {
00095                 uint16_t CONTROL;
00096                 struct ADC_CONTROL {
00097                         uint16_t ON:1;
00098                         uint16_t TIMER1_ON:1;
00099                         uint16_t TIMER2_ON:1;
00100                         uint16_t SOFT_RESET:1;
00101                         uint16_t AD1_FREFHL_EN:1;
00102                         uint16_t AD2_VREFHL_EN:1;
00103                         uint16_t :6;
00104                         uint16_t COMPARE_IRQ_MASK:1;
00105                         uint16_t SEQ1_IRQ_MASK:1;
00106                         uint16_t SEQ2_IRQ_MASK:1;
00107                         uint16_t FIFO_IRQ_MASK:1;
00108                 } CONTROLbits;
00109         };
00110         uint16_t TRIGGERS;
00111         uint16_t PRESCALE;
00112         uint16_t reserved1;
00113         uint16_t FIFO_READ;
00114         uint16_t FIFO_CONTROL;
00115         union {
00116                 uint16_t FIFO_STATUS;
00117                 struct ADC_FIFO_STATUS {
00118                         uint16_t LEVEL:4;
00119                         uint16_t FULL:1;
00120                         uint16_t EMPTY:1;
00121                         uint16_t :10;
00122                 } FIFO_STATUSbits;
00123         };
00124         uint16_t reserved2[5];
00125         uint16_t SR_1_HIGH;
00126         uint16_t SR_1_LOW;
00127         uint16_t SR_2_HIGH;
00128         uint16_t SR_2_LOW;
00129         uint16_t ON_TIME;
00130         uint16_t CONVERT_TIME;
00131         uint16_t CLOCK_DIVIDER;
00132         uint16_t reserved3;
00133         union {
00134                 uint16_t OVERRIDE;
00135                 struct ADC_OVERRIDE {
00136                         uint16_t MUX1:4;
00137                         uint16_t MUX2:4;
00138                         uint16_t AD1_ON:1;
00139                         uint16_t AD2_ON:1;
00140                         uint16_t :6;
00141                 } OVERRIDEbits;
00142         };
00143         uint16_t IRQ;
00144         uint16_t MODE;
00145         uint16_t RESULT_1;
00146         uint16_t RESULT_2;
00147 };
00148 
00149 static volatile struct ADC_struct * const ADC = (void *) (ADC_BASE);
00150 
00151 #define NUM_ADC_CHAN 9
00152 
00153 #define adc_enable()  (ADC->CONTROLbits.ON = 1)
00154 #define adc_disable() (ADC->CONTROLbits.ON = 0)
00155 #define adc_select_channels(chans) (ADC->SEQ_1 = (ADC->SEQ_1 & 0xFE00) | chans)
00156 
00157 extern uint16_t adc_reading[NUM_ADC_CHAN];
00158 void ADC_flush(void);
00159 uint16_t ADC_READ(void);
00160 void read_scanners(void);
00161 void adc_init(void);
00162 void adc_service(void);
00163 
00164 #endif

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