uart_init.c

Go to the documentation of this file.
00001 /**
00002  * \file
00003  *
00004  *   uart initialization routines
00005  *
00006  * \author
00007  * 
00008  *   Anthony "Asterisk" Ambuehl
00009  *
00010  *   non-interrupt routines typically only called once, stored in any bank.
00011  *
00012  */
00013 #include <stdlib.h>
00014 #include <string.h>
00015 
00016 #include "banked.h"
00017 #include "cc2430_sfr.h"
00018 
00019 #include "dev/leds.h"
00020 #include "dev/uart.h"
00021 
00022 /*---------------------------------------------------------------------------*/
00023 void
00024 uart0_init(uint32_t speed) __banked
00025 {
00026   if(speed == 115200) {
00027     U0BAUD=216; /*115200*/
00028     U0GCR =11;  /*LSB first and 115200*/
00029   }
00030   else if(speed == 38400) {
00031     U0BAUD=59;  /*38400*/
00032     U0GCR =10;  /*LSB first and 38400*/
00033   }
00034   else if(speed == 9600) {
00035     U0BAUD= 59; /* 9600 */
00036     U0GCR = 8;  /*LSB first and 9600*/
00037   }
00038   else { return; }
00039 
00040 #ifdef UART0_ALTERNATIVE_2
00041   PERCFG |= U0CFG;      /*alternative port 2 = P1.5-2*/
00042 #ifdef UART0_RTSCTS
00043   P1SEL |= 0x3C;                /*peripheral select for TX and RX, RTS, CTS*/
00044 #else
00045   P1SEL |= 0x30;                /*peripheral select for TX and RX*/
00046   P1 &= ~0x08;          /*RTS down*/
00047 #endif
00048   P1DIR |= 0x28;                /*RTS, TX out*/
00049   P1DIR &= ~0x14;               /*CTS & RX in*/
00050 #else
00051   PERCFG &= ~U0CFG;     /*alternative port 1 = P0.5-2*/
00052 #ifdef UART0_RTSCTS
00053   P0SEL |= 0x3C;                /*peripheral select for TX and RX, RTS, CTS*/
00054 #else
00055   P0SEL |= 0x0C;                /*peripheral select for TX and RX*/
00056   P0 &= ~0x20;          /*RTS down*/
00057 #endif
00058   P0DIR |= 0x28;                /*RTS & TX out*/
00059   P0DIR &= ~0x14;               /*CTS & RX in*/
00060 #endif
00061   
00062 
00063 #ifdef UART0_RTSCTS
00064   U0UCR = 0x42;         /*defaults: 8N1, RTS/CTS, high stop bit*/
00065 #else
00066   U0UCR = 0x02;         /*defaults: 8N1, no flow control, high stop bit*/
00067 #endif
00068   
00069   U0CSR = U_MODE | U_RE | U_TXB;  /*UART mode, receiver enable, TX done*/
00070   
00071   /*set priority group of group 3 to highest, so the UART won't miss bytes*/
00072   IP1 |= IP1_3;
00073   IP0 |= IP0_3;
00074   
00075   IEN0_URX0IE = 1;
00076 }
00077 /*---------------------------------------------------------------------------*/
00078 /* UART1 initialization */
00079 void
00080 uart1_init(uint32_t speed) __banked
00081 {
00082 #ifdef UART1_ALTERNATIVE_1
00083   PERCFG &= ~U1CFG;     /*alternative port 1 = P0.5-2*/
00084 #ifdef UART1_RTSCTS
00085   P0SEL |= 0x3C;                /*peripheral select for TX and RX, RTS, CTS*/
00086 #else
00087   P0SEL |= 0x30;                /*peripheral select for TX and RX*/
00088   P0 &= ~0x08;          /*RTS down*/
00089 #endif
00090   P0DIR |= 0x18;                /*RTS, TX out*/
00091   P0DIR &= ~0x24;               /*CTS, RX in*/
00092 #else
00093   PERCFG |= U1CFG;      /*alternative port 2 = P1.7-4*/
00094 #ifdef UART1_RTSCTS
00095   P1SEL |= 0xF0;                /*peripheral select for TX and RX*/
00096 #else
00097   P1SEL |= 0xC0;                /*peripheral select for TX and RX*/
00098   P1 &= ~0x20;          /*RTS down*/
00099 #endif
00100   P1DIR |= 0x60;                /*RTS, TX out*/
00101   P1DIR &= ~0x90;               /*CTS, RX in*/
00102 #endif
00103   
00104   if(speed == 115200) {
00105     U1BAUD=216; /*115200*/
00106     U1GCR =11;  /*LSB first and 115200*/
00107   }
00108 
00109   if(speed == 38400) {
00110     U1BAUD=59;  /*38400*/
00111     U1GCR =10;  /*LSB first and 38400*/
00112   }
00113 
00114   if(speed == 9600) {
00115     U1BAUD= 59; /* 9600 */
00116     U1GCR = 8;  /*LSB first and 9600*/
00117   }
00118 
00119 #ifdef UART1_RTSCTS
00120   U1UCR = 0x42; /*defaults: 8N1, RTS/CTS, high stop bit*/
00121 #else
00122   U1UCR = 0x02; /*defaults: 8N1, no flow control, high stop bit*/
00123 #endif
00124   
00125   U1CSR = U_MODE | U_RE | U_TXB;  /*UART mode, receiver enable, TX done*/
00126   
00127   /*set priority group of group 3 to highest, so the UART won't miss bytes*/
00128   IP1 |= IP1_3;
00129   IP0 |= IP0_3;
00130   
00131   IEN0_URX1IE = 1;      /* Enable the RX interrupt */
00132 }
00133 /*---------------------------------------------------------------------------*/

Generated on Mon Apr 11 14:23:38 2011 for Contiki 2.5 by  doxygen 1.6.1