tmr.c

00001 /*
00002  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
00003  * to the MC1322x project (http://mc1322x.devl.org)
00004  * All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. Neither the name of the Institute nor the names of its contributors
00015  *    may be used to endorse or promote products derived from this software
00016  *    without specific prior written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00019  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00020  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00022  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00024  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00025  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00026  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00027  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * This file is part of libmc1322x: see http://mc1322x.devl.org
00031  * for details. 
00032  *
00033  *
00034  */
00035 
00036 #include <mc1322x.h>
00037 #include <stdlib.h>
00038 #include "tmr.h"
00039 
00040 /* Initialize timer.  This just counts and interrupts, doesn't drive an output.
00041    timer_num = 0, 1, 2, 3
00042    rate = desired rate in Hz,
00043    enable_int = whether to enable an interrupt on every cycle
00044    Returns actual timer rate. */
00045 uint32_t timer_setup_ex(int timer_num, uint32_t rate, int enable_int)
00046 {
00047         uint32_t actual_rate;
00048         volatile struct TMR_struct *timer = TMR_ADDR(timer_num);
00049         int log_divisor = 0;
00050         uint32_t period;
00051         
00052         /* Turn timer off */
00053         TMR0->ENBL &= ~(1 << timer_num);
00054 
00055         /* Calculate optimal rate */
00056         for (log_divisor = 0; log_divisor < 8; log_divisor++)
00057         {
00058                 int denom = (rate * (1 << log_divisor));
00059                 period = (REF_OSC + denom/2) / denom;
00060                 if (period <= 65535)
00061                         break;
00062         }
00063         if (log_divisor >= 8)
00064         {
00065                 period = 65535;
00066                 log_divisor = 7;
00067         }
00068 
00069         if (period < 2) period = 2;
00070 
00071         actual_rate = REF_OSC / (period * (1 << log_divisor));
00072 
00073         /* Set up timer */
00074         
00075         timer->LOAD = 0;
00076         timer->CMPLD1 = (period - 1);
00077         timer->COMP1 = timer->CMPLD1;
00078         timer->CNTR = timer->LOAD;
00079         timer->SCTRL = 0;
00080         timer->CSCTRLbits = (struct TMR_CSCTRL) {
00081                 .CL1 = 0x01,    // Reload COMP1 when COMP1 matches
00082         };
00083         timer->CTRLbits = (struct TMR_CTRL) {
00084                 .COUNT_MODE = 1,                // Count rising edge of primary source
00085                 .PRIMARY_CNT_SOURCE = 8 + log_divisor,  // Peripheral clock divided by (divisor)
00086                 .LENGTH = 1,                    // At compare, reset to LOAD
00087         };
00088 
00089         TMR0->ENBL |= (1 << timer_num);
00090 
00091         if (enable_int) {
00092                 enable_irq(TMR);
00093                 timer->SCTRLbits.TCFIE = 1;
00094         }
00095 
00096         return actual_rate;
00097 }

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