memmap.h
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00007 #ifndef __MEMMAP_H__
00008 #error This header should not be included directly, use hal/micro/cortexm3/memmap.h
00009 #endif
00010
00011 #ifndef __STM32W108_MEMMAP_H__
00012 #define __STM32W108_MEMMAP_H__
00013
00014 #define RAM_BOTTOM (0x20000000u)
00015 #define RAM_SIZE_B (0x2000)
00016 #define RAM_SIZE_W (RAM_SIZE_B/4)
00017 #define RAM_TOP (RAM_BOTTOM+RAM_SIZE_B-1)
00018
00019 #define MFB_BOTTOM (0x08000000u)
00020 #define MFB_SIZE_B (0x20000)
00021 #define MFB_SIZE_W (MFB_SIZE_B/4)
00022 #define MFB_TOP (MFB_BOTTOM+MFB_SIZE_B-1)
00023 #define MFB_PAGE_SIZE_B (1024)
00024 #define MFB_PAGE_SIZE_W (MFB_PAGE_SIZE_B/4)
00025 #define MFB_PAGE_MASK_B (0xFFFFFC00)
00026 #define MFB_REGION_SIZE (4) // One write protection region is 4 pages.
00027 #define MFB_ADDR_MASK (0x0003FFFFu)
00028
00029 #define CIB_BOTTOM (0x08040800u)
00030 #define CIB_SIZE_B (0x200)
00031 #define CIB_SIZE_W (CIB_SIZE_B/4)
00032 #define CIB_TOP (CIB_BOTTOM+CIB_SIZE_B-1)
00033 #define CIB_PAGE_SIZE_B (512)
00034 #define CIB_PAGE_SIZE_W (CIB_PAGE_SIZE_B/4)
00035 #define CIB_OB_BOTTOM (CIB_BOTTOM+0x00) //bottom address of CIB option bytes
00036 #define CIB_OB_TOP (CIB_BOTTOM+0x0F) //top address of CIB option bytes
00037
00038 #define FIB_BOTTOM (0x08040000u)
00039 #define FIB_SIZE_B (0x800)
00040 #define FIB_SIZE_W (FIB_SIZE_B/4)
00041 #define FIB_TOP (FIB_BOTTOM+FIB_SIZE_B-1)
00042 #define FIB_PAGE_SIZE_B (1024)
00043 #define FIB_PAGE_SIZE_W (FIB_PAGE_SIZE_B/4)
00044
00045 #define FPEC_KEY1 0x45670123 //magic key defined in hardware
00046 #define FPEC_KEY2 0xCDEF89AB //magic key defined in hardware
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00048
00049 #define SIMEE_ADDR_TO_PAGE(x) ((int8u)(((int16u)(x)) >> 9))
00050 #define PAGE_TO_SIMEE_ADDR(x) (((int16u)(x)) << 9)
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00053 #define PROG_ADDR_TO_PAGE(x) ((int8u)((((int32u)(x))&MFB_ADDR_MASK) >> 10))
00054 #define PAGE_TO_PROG_ADDR(x) ((((int32u)(x)) << 10)|MFB_BOTTOM)
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00057 #endif //__STM32W108_MEMMAP_H__