mems.c
00001
00002
00003
00004
00005
00006
00007 #include PLATFORM_HEADER
00008 #include "hal/hal.h"
00009 #include "hal/error.h"
00010 #include "hal/micro/mems.h"
00011
00012 #define TIMEOUT 20000
00013
00014 #define SUCCESS 1
00015
00016 #define SEND_BYTE(data) do{ SC2_DATA=(data); SC2_TWICTRL1 |= SC_TWISEND; }while(0)
00017
00018 #define WAIT_CMD_FIN() do{}while((SC2_TWISTAT&SC_TWICMDFIN)!=SC_TWICMDFIN)
00019 #define WAIT_TX_FIN() do{}while((SC2_TWISTAT&SC_TWITXFIN)!=SC_TWITXFIN)
00020 #define WAIT_RX_FIN() do{}while((SC2_TWISTAT&SC_TWIRXFIN)!=SC_TWIRXFIN)
00021
00022 static int8u i2c_MEMS_Init (void);
00023 static int8u i2c_MEMS_Read (t_mems_data *mems_data);
00024
00025 static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfBytes);
00026 static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfBytes);
00027 int8u i2c_write_reg (int8u slave_addr, int8u reg_addr, int8u reg_value);
00028 static int8u i2c_MEMS_Init (void);
00029 static int8u i2c_MEMS_Read (t_mems_data *mems_data);
00030
00031
00032 int8u mems_Init(void)
00033 {
00034 int8u ret = 0;
00035
00036
00037
00038
00039
00040
00041
00042 TIM2_CCER &= 0xFFFFEEEE;
00043 SC2_MODE = SC2_MODE_I2C;
00044 GPIO_PACFGL &= 0xFFFFF00F;
00045 GPIO_PACFGL |= 0x00000DD0;
00046
00047 SC2_RATELIN = 14;
00048 SC2_RATEEXP = 1;
00049 SC2_TWICTRL1 = 0;
00050 SC2_TWICTRL2 = 0;
00051
00052 ret = i2c_MEMS_Init();
00053
00054
00055 #ifdef ST_DBG
00056 if (!ret)
00057 i2c_DeInit(MEMS_I2C);
00058 #endif
00059
00060 return ret;
00061 }
00062
00063 int8u mems_GetValue(t_mems_data *mems_data)
00064 {
00065 int8u i;
00066 i = i2c_MEMS_Read(mems_data);
00067 return i;
00068 }
00069
00070
00071
00072
00073
00074
00075
00076
00077
00078
00079
00080
00081
00082 static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfBytes)
00083 {
00084 int8u i, data;
00085
00086 SC2_TWICTRL1 |= SC_TWISTART;
00087 WAIT_CMD_FIN();
00088
00089 SEND_BYTE(DeviceAddress);
00090 WAIT_TX_FIN();
00091
00092
00093 for (i=0; i<NoOfBytes; i++) {
00094 halInternalResetWatchDog();
00095
00096 data = *(pBuffer+i);
00097
00098 SEND_BYTE(data);
00099
00100 WAIT_TX_FIN();
00101 }
00102
00103 SC2_TWICTRL1 |= SC_TWISTOP;
00104 WAIT_CMD_FIN();
00105
00106 return SUCCESS;
00107 }
00108
00109
00110
00111
00112
00113
00114
00115
00116
00117
00118 static int8u i2c_Receive_Frame (int8u slave_addr, int8u reg_addr, int8u *pBuffer, int8u NoOfBytes)
00119 {
00120 int8u i, addr = reg_addr;
00121
00122 if (NoOfBytes > 1)
00123 addr += REPETIR;
00124
00125 SC2_TWICTRL1 |= SC_TWISTART;
00126 WAIT_CMD_FIN();
00127
00128 SEND_BYTE(slave_addr | 0x00);
00129 WAIT_TX_FIN();
00130
00131 SEND_BYTE(addr);
00132 WAIT_TX_FIN();
00133
00134 SC2_TWICTRL1 |= SC_TWISTART;
00135 WAIT_CMD_FIN();
00136
00137 SEND_BYTE(slave_addr | 0x01);
00138 WAIT_TX_FIN();
00139
00140
00141 for (i=0;i<NoOfBytes;i++){
00142 halInternalResetWatchDog();
00143
00144 if (i < (NoOfBytes - 1))
00145 SC2_TWICTRL2 |= SC_TWIACK;
00146 else
00147 SC2_TWICTRL2 &= ~SC_TWIACK;
00148
00149 SC2_TWICTRL1 |= SC_TWIRECV;
00150 WAIT_RX_FIN();
00151 *(pBuffer+i) = SC2_DATA;
00152 }
00153
00154 SC2_TWICTRL1 |= SC_TWISTOP;
00155 WAIT_CMD_FIN();
00156
00157 return SUCCESS;
00158 }
00159
00160
00161
00162
00163
00164
00165
00166
00167
00168
00169
00170
00171 int8u i2c_write_reg (int8u slave_addr, int8u reg_addr, int8u reg_value)
00172 {
00173 int8u i2c_buffer[2];
00174
00175 i2c_buffer[0] = reg_addr;
00176 i2c_buffer[1] = reg_value;
00177
00178 return i2c_Send_Frame (slave_addr, i2c_buffer, 2);
00179 }
00180
00181
00182
00183
00184
00185
00186
00187
00188
00189
00190
00191 int8u i2c_read_reg (int8u slave_addr, int8u reg_addr, int8u *pBuffer, int8u NoOfBytes)
00192 {
00193 return i2c_Receive_Frame (slave_addr, reg_addr, pBuffer, NoOfBytes);
00194 }
00195
00196
00197
00198
00199
00200
00201
00202
00203
00204 static int8u i2c_MEMS_Init (void)
00205 {
00206 int8u i = 0;
00207
00208 i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, STATUS_REG, 0x00);
00209 i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, FF_WU_CFG, 0x00);
00210 i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, DD_CFG, 0x00);
00211 i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, CTRL_REG2, (1<<4) | (1<<1) | (1 << 0));
00212 i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, CTRL_REG1, 0xC7);
00213
00214 if (i != 5)
00215 return 0;
00216
00217 return 1;
00218 }
00219
00220
00221
00222
00223
00224
00225
00226
00227 static int8u i2c_MEMS_Read (t_mems_data *mems_data)
00228 {
00229 int8u i, i2c_buffer[8];
00230
00231 i = i2c_read_reg (kLIS3L02DQ_SLAVE_ADDR, OUTX_L, i2c_buffer, 8);
00232
00233 mems_data->outx_h = i2c_buffer[0];
00234 mems_data->outx_l = i2c_buffer[1];
00235 mems_data->outy_h = i2c_buffer[2];
00236 mems_data->outy_l = i2c_buffer[3];
00237 mems_data->outz_h = i2c_buffer[4];
00238 mems_data->outz_l = i2c_buffer[5];
00239
00240 return i;
00241 }