These macros manage the common features of the pipes. More...
Defines | |
#define | Host_select_pipe(p) (UPNUM = (U8)p) |
selects pipe for CPU interface | |
#define | Host_get_selected_pipe() (UPNUM ) |
get the currently selected pipe number | |
#define | Host_enable_pipe() (UPCONX |= (1<<PEN)) |
enables pipe | |
#define | Host_disable_pipe() (UPCONX &= ~(1<<PEN)) |
disables pipe | |
#define | Host_set_token_setup() (UPCFG0X = UPCFG0X & ~MSK_TOKEN_SETUP) |
sets SETUP token | |
#define | Host_set_token_in() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_IN) |
sets IN token | |
#define | Host_set_token_out() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_OUT) |
sets OUT token | |
#define | Host_get_endpoint_number() (UPCFG0X & (MSK_PEPNUM)) |
returns the number of the endpoint associated to the current pipe | |
#define | Host_get_pipe_interrupt() (UPINT) |
returns pipe interrupt register | |
#define | Host_set_interrupt_frequency(frq) (UPCFG2X = (U8)frq) |
sets the interrupt frequency | |
#define | Is_pipe_configured() (UPSTAX & (1<<CFGOK)) |
tests if current pipe is configured | |
#define | Is_host_one_bank_busy() ((UPSTAX & (1<<MSK_NBUSYBK)) != 0) |
tests if at least one bank is busy | |
#define | Host_number_of_busy_bank() (UPSTAX & (1<<MSK_NBUSYBK)) |
returns the number of busy banks | |
#define | Host_reset_pipe(p) (UPRST = 1<<p , UPRST = 0) |
resets the pipe | |
#define | Host_write_byte(dat) (UPDATX = dat) |
writes a byte into the pipe FIFO | |
#define | Host_read_byte() (UPDATX) |
reads a byte from the pipe FIFO | |
#define | Host_freeze_pipe() (UPCONX |= (1<<PFREEZE)) |
freezes the pipe | |
#define | Host_unfreeze_pipe() (UPCONX &= ~(1<<PFREEZE)) |
un-freezees the pipe | |
#define | Is_host_pipe_freeze() (UPCONX & (1<<PFREEZE)) |
tests if the current pipe is frozen | |
#define | Host_reset_pipe_data_toggle() (UPCONX |= (1<<RSTDT) ) |
resets data toggle | |
#define | Is_host_setup_sent() ((UPINTX & (1<<TXSTPI)) ? TRUE : FALSE) |
tests if SETUP has been sent | |
#define | Is_host_control_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE) |
tests if control IN has been received | |
#define | Is_host_control_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE) |
tests if control OUT has been sent | |
#define | Is_host_stall() ((UPINTX & (1<<RXSTALLI)) ? TRUE : FALSE) |
tests if a STALL has been received | |
#define | Is_host_pipe_error() ((UPINTX & (1<<PERRI)) ? TRUE : FALSE) |
tests if an error occurs on current pipe | |
#define | Host_send_setup() (UPINTX &= ~(1<<FIFOCON)) |
sends a setup | |
#define | Host_send_control_in() (UPINTX &= ~(1<<FIFOCON)) |
sends a control IN | |
#define | Host_send_control_out() (UPINTX &= ~(1<<FIFOCON)) |
sends a control OUT | |
#define | Host_ack_control_out() (UPINTX &= ~(1<<TXOUTI)) |
acks control OUT | |
#define | Host_ack_control_in() (UPINTX &= ~(1<<RXINI)) |
acks control IN | |
#define | Host_ack_setup() (UPINTX &= ~(1<<TXSTPI)) |
acks setup | |
#define | Host_ack_stall() (UPINTX &= ~(1<<RXSTALLI)) |
acks STALL reception | |
#define | Host_send_out() (UPINTX &= ~(1<<FIFOCON)) |
sends a OUT | |
#define | Is_host_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE) |
tests if OUT has been sent | |
#define | Host_ack_out_sent() (UPINTX &= ~(1<<TXOUTI)) |
acks OUT sent | |
#define | Is_host_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE) |
tests if IN received | |
#define | Host_ack_in_received() (UPINTX &= ~(1<<RXINI)) |
acks IN reception | |
#define | Host_send_in() (UPINTX &= ~(1<<FIFOCON)) |
sends a IN | |
#define | Is_host_nak_received() ((UPINTX & (1<<NAKEDI)) ? TRUE : FALSE) |
tests if nak handshake has been received | |
#define | Host_ack_nak_received() (UPINTX &= ~(1<<NAKEDI)) |
acks NAk received sent | |
#define | Is_host_read_enabled() (UPINTX&(1<<RWAL)) |
tests if endpoint read allowed | |
#define | Is_host_write_enabled() (UPINTX&(1<<RWAL)) |
tests if endpoint read allowed | |
#define | Host_standard_in_mode() (UPCONX &= ~(1<<INMODE)) |
sets IN in standard mode | |
#define | Host_continuous_in_mode() (UPCONX |= (1<<INMODE)) |
sets IN in continuous mode | |
#define | Host_in_request_number(in_num) (UPINRQX = (U8)in_num) |
sets number of IN requests to perform before freeze | |
#define | Host_get_in_request_number() (UPINRQX) |
returns number of remaining IN requests | |
#define | Host_data_length_U8() (UPBCLX) |
returns number of bytes (8 bits) | |
#define | Host_data_length_U16() ((((U16)UPBCHX)<<8) | UPBCLX) |
returns number of bytes (16 bits) | |
#define | Host_byte_counter() Host_data_length_U16() |
for device compatibility | |
#define | Host_byte_counter_8() Host_data_length_U8() |
for device compatibility | |
#define | Host_get_pipe_length() ((U16)0x08 << ((UPCFG1X & MSK_PSIZE)>>4)) |
returns the size of the current pipe | |
#define | Host_get_pipe_type() (UPCFG0X>>6) |
returns the type of the current pipe | |
#define | Host_error_status() (UPERRX & MSK_ERROR) |
tests if error occurs on pipe | |
#define | Host_ack_all_errors() (UPERRX = 0x00) |
acks all pipe error | |
#define | Host_enable_transmit_interrupt() (UPIENX |= (1<<TXOUTE)) |
Enable pipe end transmission interrupt. | |
#define | Host_disable_transmit_interrupt() (UPIENX &= ~(1<<TXOUTE)) |
Disable pipe end transmission interrupt. | |
#define | Host_enable_receive_interrupt() (UPIENX |= (1<<RXINE)) |
Enable pipe reception interrupt. | |
#define | Host_disable_receive_interrupt() (UPIENX &= ~(1<<RXINE)) |
Disable pipe recption interrupt. | |
#define | Host_enable_stall_interrupt() (UPIENX |= (1<<RXSTALLE)) |
Enable pipe stall interrupt. | |
#define | Host_disable_stall_interrupt() (UPIENX &= ~(1<<RXSTALLE)) |
Disable pipe stall interrupt. | |
#define | Host_enable_error_interrupt() (UPIENX |= (1<<PERRE)) |
Enable pipe error interrupt. | |
#define | Host_disable_error_interrupt() (UPIENX &= ~(1<<PERRE)) |
Disable pipe error interrupt. | |
#define | Host_enable_nak_interrupt() (UPIENX |= (1<<NAKEDE)) |
Enable pipe NAK interrupt. | |
#define | Host_disable_nak_interrupt() (UPIENX &= ~(1<<NAKEDE)) |
Disable pipe NAK interrupt. |
These macros manage the common features of the pipes.